1. Technical Field
Various embodiments generally relate to a semiconductor memory, and more particularly, to a memory system including a is semiconductor memory and an operating method thereof.
2. Related Art
In order to increase the degree of integration of memory devices and a data processing capacity, a stack memory device in which a plurality of memory chips is stacked within a single package is being developed. Furthermore, in order to improve communication speed between a processor, such as a CPU or a GPU, and a memory device, a memory controller or an interface chip is being used. Furthermore, a semiconductor device using a system-in package method of packaging a memory device and a memory controller or an interface chip together is being developed.
Meanwhile, a memory device includes memory banks each including a plurality of memory cells. The memory cells of a memory bank can be accessed through a word line and a bit line. In general, the memory device has a unit called a page. In the memory device, the page can be defined as the number of memory cells that can be accessed by a single active operation. In general, the page may be considered as the number of bit lines coupled with one word line because only one word line can be activated by a single active operation in the memory bank of the memory device.
A memory device, particularly, DRAM has a fixed page size. The meaning that DRAM has a fixed page size means that the time when a word line is accessed and the time when a word line is precharged are fixed. Accordingly, to access a page having a fixed size irrespective of the characteristics of data, such as the locality of is the data and the size of the data, leads to an unnecessary loss.